open_project stencil3d
set_top stencil3d
add_files stencil3d.cpp
add_files -tb "stencil3d_tb.cpp input.data check.data"
open_solution solution1
set_part xc7z010clg400-1
create_clock -period 10 -name default
csim_design
csynth_design
cosim_design
exit
